High NA EUV lithography was expected to begin with Intel's 14A process node late in the decade. Instead, it has appeared ahead of schedule on Panther Lake, handling layers that can also be produced using previous equipment.

A scanner priced near $400 million is now creating several layers within a laptop processor. ASML announced on Wednesday that Intel Foundry has started high-volume manufacturing for select Core Ultra Series 3 chips, known as Panther Lake, with High NA extreme ultraviolet lithography. This marks the initial instance of any chipmaker delivering a volume logic product made with the scanner.

Panther Lake utilizes Intel 18A, the process behind chips introduced at CES in January that now appear in over 200 laptop models. High NA was not anticipated for this node.

For years the strategy called for reserving the scanner for 14A, the following node. It has instead arrived sooner, creating what ASML describes as specific Intel 18A layers at the Hillsboro, Oregon site.

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High NA delivers improved resolution. Its optics use a numerical aperture of 0.55 compared with 0.33 on standard EUV systems, reducing the smallest printable feature from 13nm to 8nm in one exposure.

This capability saves expense because the alternative involves multiple patterning steps that expose the same layer two or three times along with intervening etch and deposition processes. Each additional step raises cost, extends cycle time, and risks alignment errors. Early single-exposure tests at imec on logic and DRAM patterns showed that one pass could replace several.

The hardware timeline remains brief. Intel and ASML installed the first commercial High NA system at Hillsboro in 2024, and Intel completed acceptance testing on the second-generation TWINSCAN EXE:5200B in December, achieving 175 wafers per hour and 0.7nm overlay accuracy.

A limitation exists, and ASML noted it in the announcement. The 18A layers involved are dual-qualified, approved for both High NA and older NXE tools with comparable yields.

Panther Lake therefore does not require High NA. Intel is using the scanner because it possesses one, wafers must originate somewhere, and each run supplies valuable data.

Naga Chandrasekaran, head of Intel Foundry, presented the move as a capacity decision. Qualifying the High NA option on chosen 18A layers allows the existing tool fleet to deliver greater output for customers while future capabilities are prepared for later nodes, he stated.

Economics explain why the industry has debated the transition timing for three years. At roughly $400 million each, the scanner costs twice as much as a standard EUV system and images only half the field, requiring two exposures to assemble a full pattern.

TSMC has remained the notable exception. Chairman C.C. Wei informed shareholders in June that the firm holds High NA tools for research yet cites cost as the barrier to mass production. Its A13 and A12 nodes, both targeted for 2029, are not projected to need the technology. That stance has eased slightly in tone since the company's initial public reservations in 2024.

Intel's subsequent milestone stays 14A, where High NA forms an integral part of the design. The node remains on schedule for risk production in 2028, with the 0.9 process design kit due in October, the stage at which potential foundry customers commit to volumes.

Investment continues. Intel allocated 5 billion euros to its Irish fab last week, one of the limited EUV facilities in Europe. Intel itself offered no comment on the announcement.

ASML reported stronger results. It increased 2026 revenue guidance to 43-45 billion euros from 36-40 billion euros due to AI demand and stated it would grow EUV and DUV capacity by 30 percent in each of the next two years. Chief executive Christophe Fouquet informed reporters in May that the first logic and memory products from High NA machines were months away. He proved correct, an uncommon result for lithography timelines.